Q. 1
Electronics Engineering
Difficulty: easy
(1 Mark)
What are the electrical characteristics of an ideal Operational Amplifier?
💡
Step-by-Step Explanation & Concept Rationale
An ideal op-amp draws zero input current ($I_{in} = 0$), produces zero output voltage when inputs are equal, has unlimited bandwidth, and responds instantaneously without delay or noise.
Q. 2
Electronics Engineering
Difficulty: easy
(1 Mark)
What is the closed-loop voltage gain formula for an ideal Inverting Operational Amplifier circuit with input resistor $R_{in}$ and feedback resistor $R_f$?
💡
Step-by-Step Explanation & Concept Rationale
Due to the virtual ground ($V_- = 0\text{ V}$) created at the inverting node by negative feedback, input current $I = V_{in}/R_{in}$ flows entirely through $R_f$, yielding $V_{out} = -I R_f = -V_{in} \frac{R_f}{R_{in}}$.
Q. 3
Electronics Engineering
Difficulty: easy
(1 Mark)
What is the closed-loop voltage gain formula for an ideal Non-Inverting Operational Amplifier circuit?
💡
Step-by-Step Explanation & Concept Rationale
Because $V_- = V_+ = V_{in}$ and the feedback network forms a voltage divider $V_- = V_{out} \frac{R_1}{R_1 + R_f}$, solving for gain yields $A_v = \frac{V_{out}}{V_{in}} = 1 + \frac{R_f}{R_1}$.
Q. 4
Electronics Engineering
Difficulty: easy
(1 Mark)
What is a 'Voltage Follower' (Unity Gain Buffer) and what is its primary functional purpose in sensor interfacing?
💡
Step-by-Step Explanation & Concept Rationale
High-impedance sensors (e.g. pH electrodes, piezo elements) suffer severe voltage attenuation if loaded; a voltage follower draws virtually zero current from the source while driving heavy downstream loads.
Q. 5
Electronics Engineering
Difficulty: medium
(1 Mark)
What is the 'Gain-Bandwidth Product' (GBWP or $f_T$) of an operational amplifier?
💡
Step-by-Step Explanation & Concept Rationale
For an op-amp with $\text{GBWP} = 10\text{ MHz}$, configuring the amplifier for a closed-loop gain $A_v = 100$ results in a closed-loop bandwidth of $f_{-3dB} = \frac{10\text{ MHz}}{100} = 100\text{ kHz}$.
Q. 6
Electronics Engineering
Difficulty: easy
(1 Mark)
What is the 'Slew Rate' ($SR$) of an operational amplifier?
💡
Step-by-Step Explanation & Concept Rationale
Slew rate limits the maximum full-power frequency for a sine wave $V(t) = V_p \sin(2\pi f t)$: to avoid slew-rate distortion, the maximum frequency without distortion is $f_{max} = \frac{SR}{2\pi V_p}$.
Q. 7
Electronics Engineering
Difficulty: medium
(1 Mark)
What is the maximum undistorted full-power frequency $f_{max}$ for a sinusoidal output with peak amplitude $V_p = 10\text{ V}$ driven by an op-amp with Slew Rate $SR = 10\text{ V}/\mu\text{s}$ ($10^7\text{ V/s}$)?
💡
Step-by-Step Explanation & Concept Rationale
Using the full-power bandwidth formula $f_{max} = \frac{SR}{2\pi V_p} = \frac{10^7}{2\pi \times 10} = \frac{10^6}{2\pi} \approx 159.15\text{ kHz}$. Above this frequency, the sine wave distorts into a triangle wave.
Q. 8
Electronics Engineering
Difficulty: easy
(1 Mark)
What is 'Common-Mode Rejection Ratio' (CMRR) in differential and instrumentation amplifiers?
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Step-by-Step Explanation & Concept Rationale
CMRR measures how effectively the amplifier rejects noise or interference voltages that appear identically on both input lines (such as 50/60 Hz mains hum or ground shifts), amplifying only the true difference signal.
Q. 9
Electronics Engineering
Difficulty: medium
(1 Mark)
What is the classic 3-OpAmp Instrumentation Amplifier (e.g., AD620, INA128) architecture?
💡
Step-by-Step Explanation & Concept Rationale
The 3-opamp INA delivers exceptional CMRR because the input stage amplifies the differential signal while passing common-mode voltage at unity gain ($A_{cm1} = 1$), preventing common-mode saturation and maintaining ultra-high input impedance on both inputs.
Q. 10
Electronics Engineering
Difficulty: medium
(1 Mark)
In a standard 3-OpAmp Instrumentation Amplifier, what is the formula for the overall differential voltage gain $G$ set by external resistor $R_G$ (with internal feedback resistors $R_1$ and matched difference resistors $R_2$)?
💡
Step-by-Step Explanation & Concept Rationale
For industry-standard INAs like AD620 ($R_1 = 24.7\text{ k}\Omega$), the gain formula is $G = 1 + \frac{49.4\text{ k}\Omega}{R_G}$. Setting $R_G = \infty$ (open) yields $G = 1$; connecting a precise small resistor sets arbitrary high gains.
Q. 11
Electronics Engineering
Difficulty: hard
(1 Mark)
Why is resistor matching critical in the second-stage difference amplifier of an Instrumentation Amplifier?
💡
Step-by-Step Explanation & Concept Rationale
For a difference amplifier with nominal gain of 1, worst-case CMRR due to resistor tolerance $\epsilon$ is $\text{CMRR} \approx \frac{1 + A_d}{4\epsilon}$. Achieving $100\text{ dB}$ CMRR requires laser-trimmed on-chip resistor matching better than $0.001\%$.
Q. 12
Electronics Engineering
Difficulty: easy
(1 Mark)
What is 'Input Offset Voltage' ($V_{os}$) in an operational amplifier?
💡
Step-by-Step Explanation & Concept Rationale
Offset voltage arises from slight physical mismatches in the base-emitter ($V_{BE}$) or gate-source ($V_{GS}$) characteristics of the input differential transistor pair, appearing as an error voltage in series with the input.
Q. 13
Electronics Engineering
Difficulty: medium
(1 Mark)
What is 'Input Bias Current' ($I_B$) and 'Input Offset Current' ($I_{os}$) in an op-amp?
💡
Step-by-Step Explanation & Concept Rationale
Bipolar op-amps have significant input bias currents ($10-500\text{ nA}$), which generate DC offset error voltages across source and feedback resistors. FET-input op-amps have sub-picoamp bias currents ($<1\text{ pA}$).
Q. 14
Electronics Engineering
Difficulty: medium
(1 Mark)
How can DC offset errors caused by Input Bias Current ($I_B$) be minimized in an Inverting or Non-Inverting Op-Amp circuit?
💡
Step-by-Step Explanation & Concept Rationale
Matching the DC resistance on both inputs causes equal bias currents to drop identical voltages ($V_+ = -I_{B+} R_c$ and $V_- = -I_{B-} (R_{in} \parallel R_f)$), cancelling out common-mode offset and leaving only error from the much smaller offset current $I_{os}$.
Q. 15
Electronics Engineering
Difficulty: easy
(1 Mark)
What is 'Power Supply Rejection Ratio' (PSRR) in analog signal conditioning circuits?
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Step-by-Step Explanation & Concept Rationale
High PSRR (e.g. $>100\text{ dB}$) ensures that noise, switching spikes, and 100/120 Hz ripple present on DC supply rails do not bleed through into sensitive amplified sensor signals.
Q. 16
Electronics Engineering
Difficulty: easy
(1 Mark)
What are the defining characteristics of a 'Butterworth Active Filter'?
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Step-by-Step Explanation & Concept Rationale
Butterworth filters are mathematically optimized for passband flatness: the first $2N-1$ derivatives of the power response are zero at DC ($\omega=0$), making them ideal for general-purpose anti-aliasing and audio filters.
Q. 17
Electronics Engineering
Difficulty: medium
(1 Mark)
What are the defining characteristics of a 'Chebyshev Active Filter' (Type I)?
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Step-by-Step Explanation & Concept Rationale
Chebyshev filters trade off passband amplitude uniformity (e.g. 0.5 dB or 1 dB ripple) to obtain a much sharper initial cutoff slope, making them effective when tight frequency selectivity is required.
Q. 18
Electronics Engineering
Difficulty: medium
(1 Mark)
What are the defining characteristics of a 'Bessel (Thomson) Active Filter'?
💡
Step-by-Step Explanation & Concept Rationale
Bessel filters minimize phase distortion (all frequency components experience identical time delay $t_d = -\frac{d\phi}{d\omega}$), making them essential for pulse instrumentation, biomedical ECGs, and square-wave conditioning.
Q. 19
Electronics Engineering
Difficulty: medium
(1 Mark)
What is an 'Elliptic (Cauer) Active Filter'?
💡
Step-by-Step Explanation & Concept Rationale
Elliptic filters provide the steepest conceivable cutoff slope, ideal for harsh brick-wall anti-aliasing filtering where phase non-linearity and ripple are acceptable trade-offs.
Q. 20
Electronics Engineering
Difficulty: easy
(1 Mark)
What is the roll-off attenuation slope in the stopband for an $N$-th order active analog filter?
💡
Step-by-Step Explanation & Concept Rationale
Each filter pole contributes $-20\text{ dB/decade}$ ($-6\text{ dB/octave}$) of attenuation: a 2nd-order filter rolls off at $-40\text{ dB/dec}$, a 4th-order at $-80\text{ dB/dec}$, and an 8th-order at $-160\text{ dB/dec}$.
Q. 21
Electronics Engineering
Difficulty: medium
(1 Mark)
What is the 'Sallen-Key' (Voltage-Controlled Voltage-Source - VCVS) filter topology?
💡
Step-by-Step Explanation & Concept Rationale
Sallen-Key circuits are popular because of their simplicity (1 op-amp per 2 poles), high input impedance, low component count, and non-inverting gain configuration.
Q. 22
Electronics Engineering
Difficulty: medium
(1 Mark)
In a 2nd-order Sallen-Key low-pass filter with equal resistors ($R_1 = R_2 = R$) and equal capacitors ($C_1 = C_2 = C$), what is the cutoff frequency $f_c$?
💡
Step-by-Step Explanation & Concept Rationale
With equal values, the natural resonant frequency is $\omega_0 = \frac{1}{RC} \implies f_c = \frac{1}{2\pi RC}$. The quality factor $Q$ is set by the amplifier's non-inverting feedback gain $K$: $Q = \frac{1}{3 - K}$.
Q. 23
Electronics Engineering
Difficulty: medium
(1 Mark)
What is the 'Multiple Feedback' (MFB / Rauch) active filter topology, and why is it preferred for high-Q or inverting filter designs?
💡
Step-by-Step Explanation & Concept Rationale
MFB filters place the op-amp in an inverting configuration with feedback loops around both capacitor and resistor nodes, providing excellent stability and predictable transfer curves even with high $Q$ values.
Q. 24
Electronics Engineering
Difficulty: hard
(1 Mark)
What is a 'State-Variable Filter' (Biquad / KHN Filter)?
💡
Step-by-Step Explanation & Concept Rationale
State-variable biquad filters allow independent tuning of resonant frequency $\omega_0$, Quality factor $Q$, and gain without interaction, providing simultaneous access to all standard filter transfer functions.
Q. 25
Electronics Engineering
Difficulty: easy
(1 Mark)
What is a 'Precision Half-Wave Rectifier' (Super-Diode) circuit?
💡
Step-by-Step Explanation & Concept Rationale
By placing the diode inside the op-amp's high-gain feedback loop, the op-amp output jumps to $+0.7\text{ V}$ almost instantaneously whenever input exceeds $0\text{ V}$, rectifying sub-millivolt signals accurately without diode drop.
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